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MRF89XA
3.4 Receiver
The MRF89XA is set to Receive mode when the
3.4.1
MRF89XA SECOND IF FILTER
DETAILS
CMOD<2:0> bits (GCONREG<7:5>) are set to ‘ 011 ’
(see Register 2-1 ).
The receiver is based on the superheterodyne
architecture. (In super heterodyne architecture you
need to use a saw filter to give better image rejection).
The front-end is composed of an LNA and a mixer
whose gains are constant. The mixer down-converts
the RF signal to an intermediate frequency, which is
equal to one-eighth of the LO frequency, which in turn
is equal to eight-ninths of the RF frequency. Behind this
FIGURE 3-5:
IF FILTERS IN FSK AND
OOK MODES
first mixer there is a variable gain IF amplifier that can
be programmed from maximum gain of 13.5-0 dB in
steps of 4.5 dB by altering the IFGAIN<1:0> bits
(DMODREG<1:0>).
After the variable gain IF amplifier, the signal is down-
converted into two I and Q base-band signals by two
quadrature mixers that are fed by reference signals at
one-eighth the LO frequency. These I and Q signals are
then filtered and amplified before demodulation.
The first filter is a second-order passive R-C filter
F CBW
Butterworth Low-Pass Filter for FSK
whose bandwidth can be programmed to 16 values
2 * F OPP – F CPP F OPP
F CPP
with the PASFILV<3:0> bits (FILCREG<7:4>). The
second filter can be configured as either a third-order
Butterworth active filter, which acts as a low-pass filter
for the zero-IF FSK configuration, or as a polyphase
band-pass filter for the low-IF OOK configuration. To
select Butterworth low-pass filter operation, the
POLFILEN bit (SYNCREG<7>) is set to ‘ 0 ’. The
bandwidth of the Butterworth filter can be programmed
to 16 values by configuring the BUTFILV<3:0> bits
(FILCREG<3:0>). The low-IF configuration must be
used for OOK modulation. This configuration is
enabled when the POLFILEN bit (SYNCREG<7>) is
set to ‘ 1 ’. The center frequency (fo) of the polyphase
filter can be programmed to 16 values by setting the
POLCFV<3:0> bits (PFCREG<7:4>). The bandwidth of
the filter can be programmed by configuring the
BUTFILV<3:0> bits (FILCREG<3:0>). In OOK mode,
the value of the low-IF is equal to the deviation
frequency defined in FDEVREG.
In addition to the channel filtering, the function of the
polyphase filter is to reject the image. Figure 3-5
illustrates the two configurations of the second IF filter.
In the Butterworth configuration, F CBW is the 3 dB cut-
off frequency. In the polyphase band-pass
configuration, F OPP is the center frequency given by
the POLCFV<3:0> bits (PFCREG<7:4>), and F CPP is
the upper 3 dB bandwidth of the filter whose offset,
referenced to F OPP , is given by BUTFILV<3:0> bits
(FILCREG<3:0>).
Polyphase Band-Pass Filter for OOK
After filtering, the I and Q signals are each amplified by
a chain of 11 amplifiers having 6 dB of gain each. The
outputs of these amplifiers and their intermediate 3 dB
nodes are used to evaluate the received signal strength
(RSSI). Limiters are located behind the 11 amplifiers of
the I and Q chains and the signals at the output of these
limiters are used by the FSK demodulator. The RSSI
output is used by the OOK demodulator. The global
bandwidth of the entire base-band chain is given by the
bandwidths of the passive filter, the Butterworth filter,
the amplifier chain, and the limiter. The maximum
achievable global bandwidth when the bandwidths of
the first three blocks are programmed at their upper
limit is approximately 350 kHz.
3.4.2 LNA AND FIRST MIXER
In Receive mode, the RFIO pin is connected to a fixed
gain, common-gate, Low Noise Amplifier (LNA). The
performance of this amplifier is such that the Noise
Figure (NF) of the receiver is estimated to be
approximately 7 dB.
3.4.3 IF GAIN AND SECOND I/Q MIXER
Following the LNA and first down-conversion, there is
an IF amplifier whose gain can be programmed from -
13.5-0 dB in 4.5 dB steps, through the IFGAIN<1:0>
bits (DMODREG<1:0>). The default setting
corresponds to 0 dB gain, but lower values can be used
to increase the RSSI dynamic range. For more
information, refer
strength (RSSI) .
Section 3.4.7, received signal
? 2010–2011 Microchip Technology Inc.
Preliminary
DS70622C-page 61
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